The other way in which make
processes commands is by expanding
any variable references in them (see Basics of Variable References). This occurs after make has finished reading all the
makefiles and the target is determined to be out of date; so, the
commands for targets which are not rebuilt are never expanded.
Variable and function references in commands have identical syntax and
semantics to references elsewhere in the makefile. They also have the
same quoting rules: if you want a dollar sign to appear in your
command, you must double it (‘$$’). For shells like the default
shell, that use dollar signs to introduce variables, it's important to
keep clear in your mind whether the variable you want to reference is
a make
variable (use a single dollar sign) or a shell variable
(use two dollar signs). For example:
LIST = one two three all: for i in $(LIST); do \ echo $$i; \ done
results in the following command being passed to the shell:
for i in one two three; do \ echo $i; \ done
which generates the expected result:
one two three