A variable is a name defined in a makefile to represent a string
of text, called the variable's value. These values are
substituted by explicit request into targets, prerequisites, commands,
and other parts of the makefile. (In some other versions of make,
variables are called macros.)
Variables and functions in all parts of a makefile are expanded when
read, except for the shell commands in rules, the right-hand sides of
variable definitions using ‘=’, and the bodies of variable
definitions using the define directive.
Variables can represent lists of file names, options to pass to compilers, programs to run, directories to look in for source files, directories to write output in, or anything else you can imagine.
A variable name may be any sequence of characters not containing ‘:’,
‘#’, ‘=’, or leading or trailing whitespace. However,
variable names containing characters other than letters, numbers, and
underscores should be avoided, as they may be given special meanings in the
future, and with some shells they cannot be passed through the environment to a
sub-make
(see Communicating Variables to a Sub-make).
Variable names are case-sensitive. The names ‘foo’, ‘FOO’, and ‘Foo’ all refer to different variables.
It is traditional to use upper case letters in variable names, but we recommend using lower case letters for variable names that serve internal purposes in the makefile, and reserving upper case for parameters that control implicit rules or for parameters that the user should override with command options (see Overriding Variables).
A few variables have names that are a single punctuation character or just a few characters. These are the automatic variables, and they have particular specialized uses. See Automatic Variables.